1. Field of the Invention
This invention relates generally to a system and method for modulating a clock signal and digital data onto a sinusoidal carrier wave and, more particularly, to a system and method for modulating a clock signal and a digital data signal onto a sinusoidal carrier wave, where more than one bit of data is transmitted for each cycle of the carrier wave.
2. Discussion of the Related Art
Digital data is transmitted from a transmitter to a receiver in digital communications systems. The digital data is modulated onto a sinusoidal carrier wave in the transmitter, transmitted, and then demodulated or extracted from the carrier wave in the receiver so that the data can be processed. Various modulation and demodulation schemes are known in the art for modulating the carrier wave to distinguish the zero and one bits in the transmitted signal.
Known modulation techniques include amplitude modulation or on/off keying (OOK) where a change in the amplitude of the carrier wave distinguishes a one bit and a zero bit; frequency-shift keying (FSK) where the frequency of the carrier wave is changed to distinguish a one bit and a zero bit; phase-shift keying (PSK) where polarity changes in the carrier wave provides a 180° phase change that is used to distinguish a one bit and a zero bit; and quadrature amplitude modulation (QAM) where the digital data is converted into two-bit symbols which are used to phase modulate the carrier wave. Other types of modulation schemes that combine or are hybrids of those mentioned above are also known in communications systems.
Typically, the transmitter and the receiver employ asynchronous clock signals to control the operation of the various logic circuits. Therefore, the data stream must by synched to the clock signal in the receiver to extract the data. In some systems, a clock signal is transmitted with the data to provide increased clock synchronization capabilities. Further, based on the Nyquist sampling theorem, the sampling rate of the data in the receiver must be at least twice as fast as the data rate. In other words, there must be a minimum of two clock cycles in the receiver for every bit of data. Typically, the data rate is arbitrary relative to the receiver clock signal rate. Thus, there are inherent limitations on how much data can be transmitted at a certain clock rate in the known systems.
Moreover, because the clock signal rate in the receiver is different than the data frequency rate of the transmitted data, there are bandwidth limitations in the system. Particularly, the frequency of the data rate adds sidebands to the center frequency of the carrier wave, which limits the bandwidth in which other carrier waves can be transmitted. Therefore, by not synchronizing the data to the clock, the necessary bandwidth for data transmission is increased. Also, because the carrier waves are typically generated by crystals that have inherent limitations in accuracy, the center frequency of the carrier wave may vary from time to time from an average center frequency.